Recently, reconfigurable digital image processing algorithm has become growing research area in field of real-time embedded system. Conventionally, Matlab and C/C++ is preferred simulation tool and test for the correctness of computer vision algorithms. But currently image processing algorithms can also be implemented in hardware for special purpose such as high computational speed and better accuracy. The challenging task is how to implement these computer vision algorithms to meet hard market demands like real-time processing, stringent power consumption and also optimize hardware resources. The introduction of HDL such as Very High Speed Integrated Circuit with Emphasis (VHDL)  provided a fascinating simulation and modeling environment for fast prototyping of digital circuits and systems on FPGA devices. The FPGA technology  is used for digital signal and image processing applications for better accuracy and high performance in real life application. The FPGA devices provide fully re-programmable in nature with system-on-chip (SoC) environments. This architecture consists of thousands of logic gates and configurable logic blocks which make them a suitable solution for prototyping the integrated circuits (ASIC) that are application specific and with dedicated architectures for specified digital signal applications. Hardware based image processing are much attention for electronic engineer for better performance of a given image. Hardware design techniques such as parallelism and pipelining  techniques can be developed on an FPGA platform, which is not found other processors like digital signal processor (DSP) or media processor. The FPGA devices provide accelerate the system performance, easy flexibility and also upgradability. The significant features of FPGAs such as flexibility to reprogrammable, high computing speed, low power consumption and above all low cost make them better choice in field of digital image processing.